详细描述DDR4的资料

• Ultra-low-voltage core and I/O power supplies • Frequency range – 933–10 MHz (data rate range: 1866–20 Mb/s/pin) • 8n prefetch DDR architecture • 8 internal banks for concurrent operation • Multiplexed, double data rate, command/address inputs; commands entered on each CK_t/CK_c edge • Bidirectional/differential data strobe per byte of data (DQS_t/DQS_c) • Programmable READ and WRITE latencies (RL/WL) • Burst length: 8 • Per-bank refresh for concurrent operation • Temperature-compensated self refresh (TCSR) • Partial-array self refresh (PASR) • Deep power-down mode (DPD) • Selectable output drive strength (DS) • Clock-stop capability • On-die termination (ODT) • RoHS-compliant, “green” packaging

Cadence Allegro作品-DDR4笔记本内存；希望对大家有帮助！！!

JEDEC STANDARD DDR4 SDRAM JESD79-4B (Revision of JESD79-4A, November 2013) JUNE 2017

Low Power DDR4 spec LPDDR4

DDR4颗粒使用的过程需要控制器在初始化的时候下发SPD的配置，根据实际的使用情况适当修改参数，文档中对每一个参数做了详细的解释，便于大家学习

DDR4协议，JESD79-4， 方便开发者学习参考

micron ddr4 仿真模型 verilog版本

Micron 官网上的关于LPDDR4容量的说明手册，由于下载需要注册，特意下载下来共享。

博客配套源码工程 https://blog.csdn.net/botao_li/article/details/95302992